Space Shuttle's I/O Processor Ran 25 Virtual CPUs in 1970s Hardware

Each of the Space Shuttle's five general-purpose computers relied on an I/O Processor that ran 25 virtual processors and two instruction sets from a single physical chip—a feat of multithreading that predates modern commercial designs by decades.

The IOP's Unusual Architecture: 25 Virtual Processors in One

IBM built the I/O Processor (IOP) as a separate programmable computer, more complex than the main CPU. While the CPU executed 420,000 instructions per second from a 32-bit processor built from multiple boards and magnetic core memory, the IOP implemented 25 virtual processors with two completely different instruction sets, all running on one physical processor. That's a multithreaded design before the term existed in mainstream computing.

The IOP connected the CPU to the rest of the Shuttle via 24 high-speed networks, each handling 1 million bits per second. Six network interface cards, each a 9×3 inch "page" packed with tiny chips, provided those connections. The IOP wasn't a simple peripheral—it was the traffic controller for thousands of sensors, displays, and engine controllers.

Inside the MIA Interface Card: Analog Meets Digital on a Single Page

Ken Shirriff obtained two circuit cards from an IOP. The top card is the MIA (Multiplexer Interface Adapter), handling four network connections per card. Each network transmits data over twisted-pair shielded wires—not coax—using analog voltage signals that weaken and distort over distance. The card's right half contains analog circuitry: a large golden IBM hybrid module packed with transistor dies, resistors, capacitors, and bond wires thinner than a hair. Hybrid modules like this were the aerospace answer to shrinking analog boards into single expensive packages.

Transformers couple the interface board to the network, providing isolation and filtering electromagnetic interference—same principle as Ethernet, but built for mission-critical reliability. The Shuttle had 28 data bus networks total; each computer attached to 24 for redundancy, with flight-critical systems like CRT displays and engine controllers connected to four networks each.

Manchester Encoding: A 1940s Invention Powering 1980s Spaceflight

The networking scheme used Manchester encoding, patented in 1946 by Frederic Williams at the University of Manchester—the same team that gave us the stored-program computer and the Williams tube. Each 0 bit becomes a low-high sequence; each 1 bit becomes high-low. Trivial on paper, but it gave the Shuttle reliable serial communication without a separate clock signal, decades before Ethernet adopted the same idea.

Shirriff's teardown also covers the PROM page that stored microcode in rows of tiny metal fuses, programmed by blowing each one for a 1 bit. The IOP's microcode defined every instruction—a level of control that made the processor reconfigurable in hardware.

These circuit boards show that when engineers couldn't buy a microprocessor off the shelf, they built one with brute-force ingenuity: 25 virtual processors, two instruction sets, analog-digital fusion, and a 1940s encoding trick, all in a 60-pound aluminum box that flew 135 missions.

Source: Examining circuit boards from the Space Shuttle's I/O Processor
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